Matching Items (242)
Description
The goal of this paper is to demonstrate the feasibility of low-cost, mixed-signal integrated circuit design for educational and research purposes. This paper presents the design and prototyping of an 8-bit SAR ADC (Successive Approximation Register Analog to Digital Converter) and surrounding circuit, but is focused on the open source softwares used in its development. The circuit is all developed using entirely open-source tools with the goal to be fabricated via the TinyTapeout service. The project employs Icarus Verilog, KiCad, Qspice, Arduino, and Python for design, simulation, and system-level modeling. Our results indicate the unpredictable nature of working with less known companies and applications as well as the viability of completing the circuit design process in this way. These applications generally have less capability than proprietary circuit design flows and it is up to the engineer to learn these tools. The work highlights both the potential and the limitations of current open-source IC design ecosystems and provides a model for future educational implementations in chip design.
ContributorsDarnall, Michael (Author) / Wiberg, Vance (Co-author) / Yu, Hongbin (Thesis director) / Doyle, Jim (Committee member) / Barrett, The Honors College (Contributor) / Electrical Engineering Program (Contributor)
Created2025-05
Description
Conventional four-point-probe (4PP) stations achieve high-accuracy sheet-resistance measurements but often lack the ability to perform mapping across an area of a sample. Commercial tools also feature a large (80-100 mil) probe spacing, which limits the spatial resolution of the sheet-resistance measurement.We retrofitted an R-θ-Z wafer stage with a 3-D-printed probe head and spring-loaded, 410 µm-diameter gold pins, controlled through a new Python automation stack, to build a wafer-mapper. While the gold probe pins work well on metal films, sheet-resistance measurements on silicon samples require the probe tips to mechanically pierce the native SiO₂ that spontaneously grows on silicon wafers. For device-grade specimens this mechanical scratching is undesirable,because it could lead to the introduction of mechanical defects. Initial experiments were conducted that applied high-voltage (≤ 105V), low-current (≤ 1 mA) pulses to break down the oxide electrically. However, tip deformation increased the effective contact area, raising the breakdown voltage beyond practical limits and preventing reliable contact formation, causing large variations in the mapping data. We therefore explored a contact-less eddy-current approach using a single-loop RF coil. The RF excitation signal was swept from 100 kHz to 6 GHz while its complex reflection coefficient ( S₁₁ ) was captured. The resulting resonance-splitting or “fan-out” of S₁₁ spectra correlates monotonically with the sheet resistivity of test wafers (1-140 Ω □⁻¹). LTSpice models of the coil-wafer system reproduced the measured trends, lending confidence that calibrated peak-tracking can yield quantitative resistivity maps. This work demonstrates the feasibility of a hybrid probe station that performs non-contact characterization of bulk silicon samples. In future iterations this characterization technique can also be applied to thin-film measurements. Key design lessons and an outline for refining the probe head and extraction algorithms are presented.
ContributorsStringer, Evan (Author, Co-author) / Goryll, Michael (Thesis director) / Celano, Umberto (Committee member) / Barrett, The Honors College (Contributor) / Electrical Engineering Program (Contributor) / Computer Science and Engineering Program (Contributor)
Created2025-05